p1819 notebook lcd panel emi reduction ic ?2010 scillc. all rights reserved. p u blication order number: november 2010 C rev. 3.1 p 1819/d fea tures fcc approved method of emi attenuation. provides up to 15db emi reduction. generates a low emi spread spectrum clock and a non-spread reference clock of the input frequency. optimized for frequency range from 20 to 40mhz. internal loop filter minimizes external components and board space. selectable spread options: down and center. low inherent cycle-to-cycle jitter. two different deviation selections. modrate is compliant with ati m7x vga spec. 3.3v 0.3v operating voltage range. low power cmos design. supports notebook vga and other lcd timing controller applications. power down function for mobile application. available in 8-pin soic package. product description the p1819 is a versatile spread spectrum frequency m o dulator designed specifically for input clock frequencies from 20 to 40mhz. (refer to input frequency and modulation rate table ). the p1819 reduces electromagnetic interference (emi) at the clock source, allowing system wide reduction of emi of down stream clock and data dependent signals. the p1819 allows significant system cost savings by reducing the number of circuit board layers, ferrite beads, shielding, and other passive components that are traditionally required to pass emi regulations. the p1819 modulates the output of a single pll in order to spread the bandwidth of a synthesized clock, and more importantly, decreases the peak amplitudes of its harmonics. this result in significantly lower system emi compared to the typical narrow band signal produced by oscillators and most frequency generators. lowering emi by increasing a signals bandwidth is called spread spectrum clock generation. the p1819 is available in different spread deviation, refer to spread deviation selection table. the p1819 uses the most efficient and optimized modulation profile approved by the fcc and is implemented in a proprietary all digital method. applications the p1819 is targeted towards emi management for me mory and lvds interfaces in mobile graphic chipsets and high-speed digital applications such as pc peripheral devices, consumer electronics, and embedded controller systems. blo ck diagram vss v d d modout xin / clkin frequency divider feedback divider modulation phase detector loop filter vco output divider pll srs d_c/nc pd# crystal oscillator xout ref
p1819 rev.3 | page 2 of 6 | www.onsemi.com p in configuration pin description pin# pin name type description p1819b p1819g 1 1 xin / clkin i crystal connection or external frequency input. this pin has dual functions. it can be connected to either an external crystal or an external reference clock. 2 2 vss p ground connection. connect to system ground. 3 srs i spread range select. digital logic input used to select frequency deviation (refer to spread deviation selection table) . this pin has an internal pull-up resistor. 3 3 d_c / nc i digital logic input used to select down (low) or center (high) spread options (refer to spread deviation selection table) . this pin has an internal pull-up resistor. 4 4 modout o spread spectrum clock output. (refer to input frequency and modulation rate table and spread deviation selection table). 5 5 ref o non-modulated reference clock output of the input frequency. 6 6 pd# i power down control pin. pull xin/clkin and pd# low to enable power-down mode. this pin has an internal pull-up resistor. 7 7 vdd p power supply for the entire chip. 8 8 xout o crystal connection. input connection for an external crystal. if using an external reference, this pin must be left unconnected. note: pin 3 is nc in p1819q. in put frequency and modulation rate part number input frequency range output frequency range modulation rate p1819 20mhz to 40mhz 20mhz to 40mhz input frequency / 896 vdd p d# xout ref 1 2 3 4 5 6 7 8 p1819 b xin / clkin v ss srs modout vdd ref 1 2 3 4 5 6 7 8 p1819 g xin / clkin v ss d_c / nc modout pd# xout
p1819 rev.3 | page 3 of 6 | www.onsemi.com s pread deviation selection part number srs d_c spread deviation p1819b 0 na -1.25% (down) 1 -1.75% (down) p1819g na 0 -1.75% (down) 1 0.875% (center) absolute maximum ratings symbol parameter rating unit v dd , v in voltage on any pin with respect to ground -0.5 to +4.6 v t stg storage temperature -65 to +125 c t s max. soldering temperature (10 sec) 260 c t j junction temperature 150 c t dv static discharge voltage (as per jedec std22- a114-b) 2 kv note: these are stress ratings only and are not implied for functional use. exposure to absolute maximum ratings for prolonged periods of time may affect device reliability. operating conditions symbol parameter min max unit vdd supply voltage 3.0 3.6 v t a operating temperature -40 +85 c c l load capacitance 15 pf c in input capacitance 7 pf
p1819 rev.3 | page 4 of 6 | www.onsemi.com d c electrical characteristics symbol parameter min typ max unit v il input low voltage vssC0.3 0.8 v v ih input high voltage 2.0 v dd +0.3 v i il input low current (inputs d_c, pd#, srs) -60.0 -20.0 a i ih input high current 1.0 a i xol x out output low current @ 0.4v, v dd = 3.3v 2.0 12.0 ma i xoh x out output high current @ 2.5v, v dd = 3.3v 12.0 ma v ol output low voltage v dd = 3.3v, i ol = 20ma 0.4 v v oh output high voltage v dd = 3.3v, i oh = 20ma 2.5 - v i cc dynamic supply current normal mode 3.3v and 25pf probe loading 7.1 f in - min 26.9 f in - max ma i dd static supply current standby mode 4.5 ma v dd operating voltage 3.0 3.3 3.6 v t on power up time (first locked clock cycle after power up) 0.18 ms z out clock output impedance 50 ac electrical characteristics symbol parameter min typ max unit f in input frequency 20 40 mhz f out output frequency 20 40 mhz t lh 1 output rise time(measured from 0.8v to 2.0v) 0.66 ns t hl 1 output fall time (measured from 2.0v to 0.8v) 0.65 ns t jc jitter (cycle-to-cycle) -200 200 ps t ltj long term jitter,(1000 cycle) on refout @ 27mhz 475 ps t d output duty cycle 45 50 55 % note: 1. t lh and t hl are measured into a capacitive load of 15pf.
p1819 rev.3 | page 5 of 6 | www.onsemi.com p ackage information 8-pin soic package d e h d a1 a2 a q l c b e symbol dimensions inches millimeters min max min max a1 0.004 0.010 0.10 0.25 a 0.053 0.069 1.35 1.75 a2 0.049 0.059 1.25 1.50 b 0.012 0.020 0.31 0.51 c 0.007 0.010 0.18 0.25 d 0.193 bsc 4.90 bsc e 0.154 bsc 3.91 bsc e 0.050 bsc 1.27 bsc h 0.236 bsc 6.00 bsc l 0.016 0.050 0.41 1.27 0 8 0 8 note: controlling dimensions are millimeters soic C 0.074 grams unit weight
p1819 rev.3 | page 6 of 6 | www.onsemi.com o rdering code part number marking package type temperature P1819BF-08SR aby 8-pin soic, tape & reel, pb free 0c to +70c p1819gf-08sr aca 8-pin soic, tape & reel, pb free 0c to +70c a microdot placed at the end of last row of marking or just below the last row toward the center of package indicates pb-free on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. typical parameters which may be provided in scillc data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including typicals must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. u.s patent pending; timing-safe and active bead are trademarks of pulsecore semiconductor, a wholly owned subsidiary of on semiconductor. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information literature fulfillment: literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone: 303-675-2175 or 800-344-3860 toll free usa/canada fax: 303-675-2176 or 800-344-3867 toll free usa/canada email: orderlit@onsemi.com n. american technical support: 800-282-9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81-3-5773-3850 on semiconductor website: www.onsemi.com order literature: http://www.onsemi.com/orderlit for additional information, please contact your local sales representative
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